View FSA2467UMX12_4731567.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

april 2012 ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2467 rev. 1.0.8 fsa2467 ? 0.4 ? low-voltage dual dpdt analog switch click to see this datasheet in simplified chinese! fsa2467 0.4 ? low-voltage dual dpdt analog switch features ? typical 0.4 on resistance (r on ) for +2.7v supply ? features less then12a i cct current when sn input is lower than v cc ? 0.25 maximum r on flatness for +2.7v supply ? 3 x 3mm 16-lead mlp package ? 1.8x2.6mm 16-lead umlp package ? broad v cc operating range ? low thd (0.02% typical for 32 load) applications ? cell phone ? pda ? portable media player description the fsa2467 is a dual double-pole, double-throw (dpdt) analog switch. the fsa2467 operates from a single 1.65v to 4.3v suppl y. the fsa2467 features an ultra-low on resistance of 0.4 at a +2.7v supply and 25c. this device is fabric ated with sub-micron cmos technology to achieve fast switching speeds and is designed for break-befor e-make operation. fsa2467 features very low quiescent current even when the control voltage is lower than the v cc supply. this feature allows mobile hands et applications direct interface with baseband processor general-purpose i/os. ordering information part number top mark package description fsa2467mpx fsa 2467 16-lead molded leadless package (mlp), jedec mo-220, 3 x 3mm square fsa2467umx gc 16-lead ultrathin molded leadless package (umlp), 1.8 x 2.6mm application diagram figure 1. application diagram
? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2467 rev. 1.0.8 2 fsa2467 ? 0.4 ? low-voltage dual dpdt analog switch pin assignments 1 5 6 7 8 9 10 11 2 3 12 16 15 14 13 4 1a 1b 1 v cc 4b 0 4a 4b 1 2s 3b 0 2b 0 gnd 3b 1 3a 1b 0 1s 2b 1 2a figure 2. mlp (top through view) figure 3. umlp (top view) truth table pin descriptions control inputs function name function low nb 0 connected to na na nb 0 nb 1 data ports high nb 1 connected to na ns control input analog symbol figure 4. analog symbol
? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2467 rev. 1.0.8 3 fsa2467 ? 0.4 ? low-voltage dual dpdt analog switch absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the devic e may not function or be operable above the recommended operating c onditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stre sses above the recommended operating conditi ons may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v cc supply voltage -0.5 5.0 v v s switch voltage -0.5 v cc +0.3 v v in input voltage -0.5 5.0 v i ik input diode current -50 ma i sw switch current 350 ma i swpeak peak switch current (pulsed at 1ms duration, <10% duty cycle) 500 ma t stg storage temperature range -65 +150 oc t j junction temperature +150 oc t l lead temperature, soldering 10 seconds +260 oc esd electrostatic discharge capability human body model, jesd22-a114 5.5 kv recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ens ure optimal performance to the datasheet specificat ions. fairchild does not recommend exceeding them or designi ng to absolute maximum ratings. symbol parameter min. max. unit v cc supply voltage 1.65 4.30 v v in control input voltage (1) 0 v cc v v s switch input voltage 0 v cc v t a operating te mperature -40 +85 oc note 1. unused inputs must be held high or low. they may not float.
? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2467 rev. 1.0.8 4 fsa2467 ? 0.4 ? low-voltage dual dpdt analog switch dc electrical characteristics typical values are at 25 o c unless otherwise specified. symbol parameter condition v cc (v) t a = +25oc t a = -40 to +85oc unit min. typ. max. min max. v ih input voltage high 4.3 1.4 v 2.7 to 3.6 1.3 2.3 to 2.7 1.1 1.65 to 1.95 0.9 v il input voltage low 4.3 0.7 v 2.7 to 3.6 0.5 2.3 to 2.7 0.4 1.65 to 1.95 0.4 i in control input leakage v in =0v to v cc 1.65 to 4.30 -0.5 0.5 a i no(off) i nc(off) off leakage current of port nb 0 and nb 1 na=0.3v, v cc -0.3v 1.95 to 4.30 -10 10 -50 50 na nb 0 or nb 1 =0.3v, v cc - 0.3v or floating i a(on) on leakage current of port a na=0.3v,v cc -0.3v 1.95 to 4.30 -10 10 -50 50 na nb 0 or nb 1 =0.3v, v cc - 0.3v or floating r on switch on resistance (2) i out =100ma 4.3 0.4 0.6 ? nb 0 or nb 1 =0v,0.8v, 1.8v,2.7v 2.7 0.4 0.6 i out =100ma, nb 0 or nb 1 =0v,0.7v, 1.2v, 2.3v 2.3 0.55 0.95 i out =100ma, nb 0 or nb 1 =1.0v 1.8 0.8 2.0 ? r on on resistance matching between channels (3) i out =100ma, nb 0 or nb 1 =0.8v 2.7 0.04 0.10 ? i out =100ma, nb 0 or nb 1 =0.7v 2.3 0.03 0.10 r flat(on) on resistance flatness (4) i out =100ma, b 0 or nb 1 =0v to v cc 2.7 0.25 ? 2.3 0.3 i cc quiescent supply current v in =0v to v cc i out =0v 4.3 -100 100 -500 500 na i cct increase in i cc current per control voltage v in =1.8v 4.3 7 12 15 a v in =2.6v 4.3 3 6 7 notes : 2. on resistance is determined by t he voltage drop between a and b pins at t he indicated current through the switch. 3. ? r on =r on max ? r on min measured at identical v cc , temperature and voltage. 4. flatness is defined as the diffe rence between the maximum and minimum value of on resistance over the specified range of conditions.
? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2467 rev. 1.0.8 5 fsa2467 ? 0.4 ? low-voltage dual dpdt analog switch ac electrical characteristics typical values are at 25oc unless otherwise specified. symbol parameter condition v cc t a = +25oc t a = -40 to +85oc unit figure min. typ. max. min. max. t on turn-on time nb0 or nb1=1.5v 3.6 to 4.3 50 60 ns figure 8 r l =50 ? , c l =35pf 2.7 to 3.6 65 75 2.3 to 2.7 80 90 t off turn-off time nb0 or nb1=1.5v 3.6 to 4.3 32 40 ns figure 8 r l =50 ? , c l =35pf 2.7 to 3.6 42 50 2.3 to 2.7 52 60 t bbm break-before- make time nb0 or nb1=1.5v 3.6 to 4.3 12 ns figure 9 r l =50 ? , c l =35pf 2.7 to 3.6 15 2.3 to 2.7 20 q charge injection c l =100pf, v gen =0v, r gen =0 ? 3.6 to 4.3 15 pc figure 11 c l =100pf, v gen =0v, r gen =0 ? 2.7 to 3.6 10 c l =100pf, v gen =0v, r gen =0 ? 2.3 to 2.7 8 oirr off isolation f=100khz, r l =50 ? ,c l =5pf 3.6 to 4.3 -75 db figure 10 2.7 to 3.6 -75 2.3 to 2.7 -75 xtalk crosstalk f=100khz, r l =50 ? , c l =5pf 3.6 to 4.3 -75 db figure 10 2.7 to 3.6 -75 2.3 to 2.7 -75 bw -3db bandwidth r l =50 ? 2.3 to 4.3 85 mhz figure 13 thd total harmonic distortion r l =32 ? , v in =2v pp , f=20 to 20khz 3.6 to 4.3 0.02 % figure 14 r l =32 ? , v in =2v pp , f=20 to 20khz 2.7 to 3.6 0.02 r l =32 ? , v in =2v pp , f=20 to 20khz 2.3. to 2.7 0.02 capacitance symbol parameter condition v cc t a = +25oc typical unit figure c in control pin input capacitance f=1mhz 0 1.5 pf figure 8 c off b port off capacitance f=1mhz 3.3 32 pf figure 8 c on a port on capacitance f=1mhz 3.3 118 pf figure 8
? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2467 rev. 1.0.8 6 fsa2467 ? 0.4 ? low-voltage dual dpdt analog switch typical applications figure 5. r on at 2.7v v cc figure 6. r on at 2.3v v cc figure 7. r on at 1.8v v cc
? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2467 rev. 1.0.8 7 fsa2467 ? 0.4 ? low-voltage dual dpdt analog switch ac loadings and waveforms figure 8. turn-on / turn-off timing figure 9. break-before-make timing figure 10. off isolation and crosstalk
? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2467 rev. 1.0.8 8 fsa2467 ? 0.4 ? low-voltage dual dpdt analog switch ac loadings and waveforms (continued) figure 11. charge injection figure 12. on / off capacitance measurement setup figure 13. bandwidth figure 14. harmonic distortion
? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2467 rev. 1.0.8 9 fsa2467 ? 0.4 ? low-voltage dual dpdt analog switch package dimensions figure 15. 16-lead, molded leadless p ackage (mlp), jedec mo-220 3x3mm square package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . for current tape and reel specif ications, visit fairchild semi conductor?s online packaging area: http://www.fairchildsemi.com/packaging/3x3mlp16_pack_tnr.pdf .
? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2467 rev. 1.0.8 10 fsa2467 ? 0.4 ? low-voltage dual dpdt analog switch package dimensions recommended land pattern notes: a. package does not fully conform to jedec standard. b. dimensions are in millimeters. c. dimensions and tolerances per asme y14.5m, 1994. d. land pattern recommendation is based on fsc design only. e. drawing filename: mkt-umlp16arev4. f. terminal shape may vary according to package supplier, see terminal shape variants. scale : 2x lead option 1 scale : 2x lead option 2 pin#1 ident pin#1 ident package edge top view bottom view 0.10 c 0.08 c 2.60 1.80 0.10 c 2x 2x side view 0.10 c 0.05 0.00 0.10 c a b 0.05 c 0.55 max. 0.40 1 5 9 13 16 2.10 2.90 0.40 0.663 0.563 0.225 1 (15x) (16x) 0.152 0.40 0.60 0.10 0.30 0.50 0.10 terminal shape variants 0.15 0.25 15x pin 1 non-pin 1 0.15 0.25 15x 0.30 0.50 0.15 0.25 0.30 0.50 0.15 0.25 15x 15x supplier 1 supplier 2 pin 1 non-pin 1 a b c seating plane 0.45 0.35 0.55 0.45 0.25 0.15 r0.20 figure 16. 16-lead, ultrathin molded leadless package (umlp) package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2467 rev. 1.0.8 11 fsa2467 ? 0.4 ? low-voltage dual dpdt analog switch

▲Up To Search▲

Price & Availability of FSA2467UMX12

	To Download FSA2467UMX12 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .